Table of Contents

Why Regli™

Exceptional Signal Integrity

RegliTM actively participates in link equalization to help maintain PCIe Gen5 link integrity for GPUs, XPUs, and NVMe SSDs

Security-minded

Our in-house security team keeps security at the helm of every decision, ensuring complete peace of mind

Rapid Response

Operating at sub-13 nanoseconds latency, RegliTM is one of the fastest PCle retimers in the world

System Designer's Dream

With class-leading bifurcation and on-chip diagnostics across the RegliTM product family, you get the fit and reliability that designers love.

Complete feature list

PCIe 5.0 support up to 32 GT/s, x16/x8/x4 bidirectional lanes

CXL 1.0 and CXL 2.0 support

Extended system reach

Improved signal integrity

Ultra-low latency

Simplified system design

Multiple control interface

  • SMBus slave or I2C slave (BMC connection)
  • EEPROM master
  • SPI master (SPI flash)
  • GPIO strapping pins for lane bifurcation configuration
  • JTAG

Flexible clock mode

On-chip diagnostics

Power supply:

  • Regular power mode- two supply rails, 1.8V and 0.9V. Reduced power mode- three supply rails, 1.8V, 1.2V/1.5V and 0.9V
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Discover the Regli™ retimer family

                          Protocol-aware PCIe Gen 5 and CXL retimers delivering ultra-low latency and extended reach for demanding compute, AI, and storage applications.

KB9003

KB9002

KB9001

Status
Production
Sampling
Coming Soon
PCIe Lanes
16-lane bidirectional
8-lane bidirectional
4-lane bidirectional
Max Data Rate
32 GT/s
32 GT/s
-
CXL Support
CXL 1.0 and CXL 2.0
CXL 1.0 and CXL 2.0
-
Latency (low Latency mode)
< 13 ns
< 13 ns
-
Channel Loss (EQ)
36 dB
36 dB
-
Package
354-ball BGA | 8.9 x 22.8 mm
332-ball BGA | 8.5 x 13.4 mm
-
Best For
Data Centers | AI Accelerators | Backplanes
Servers  | Hyperscalers | AI Accelerators
Coming Soon - Contact Kandou for further information

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(Chord SignalingTM)

Every Kandou product is powered by our proprietary technology built at the intersection of information theory and semiconductor design.

Over 10× lower cost | 3× lower power | 8× more scale

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Multiple control interface

  • SMBus slave or I2C slave (BMC connection)
  • EEPROM master
  • SPI master (SPI flash)
  • GPIO strapping pins for lane bifurcation configuration
  • JTAG
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